TY - GEN
T1 - A matrix converter control embedded in a single system on chip based on a FPGA
AU - Ormaetxea, E.
AU - Andreu, J.
AU - Kortabarria, I.
AU - Martínez De Alegría, I.
AU - Robles, E.
PY - 2010
Y1 - 2010
N2 - The matrix converter (MC) presents a promising topology that needs to overcome certain barriers (complexity of the modulation and control techniques, protection systems, etc.) in order to gain a foothold in the industry. This article deals with the implementation of the DS SVM vector modulation, commutation and protection of the MC through a series of hardware blocks (cores) integrally implemented in an FPGA. Likewise, given that all the processing capabilities have been integrated in a single chip, it can be said that an FPGA-based System on a Chip (SoC) has been designed.
AB - The matrix converter (MC) presents a promising topology that needs to overcome certain barriers (complexity of the modulation and control techniques, protection systems, etc.) in order to gain a foothold in the industry. This article deals with the implementation of the DS SVM vector modulation, commutation and protection of the MC through a series of hardware blocks (cores) integrally implemented in an FPGA. Likewise, given that all the processing capabilities have been integrated in a single chip, it can be said that an FPGA-based System on a Chip (SoC) has been designed.
KW - FPGA
KW - Hardware core
KW - Matrix converter
KW - System on chip
UR - http://www.scopus.com/inward/record.url?scp=77956089225&partnerID=8YFLogxK
U2 - 10.1049/cp.2010.0206
DO - 10.1049/cp.2010.0206
M3 - Conference contribution
AN - SCOPUS:77956089225
SN - 9781849192316
T3 - IET Conference Publications
BT - 5th IET International Conference on Power Electronics, Machines and Drives, PEMD 2010
T2 - 5th IET International Conference on Power Electronics, Machines and Drives, PEMD 2010
Y2 - 19 April 2010 through 21 April 2010
ER -