Analysis of voltage balancing limits in modular multilevel converters

Salvador Ceballos; Josep Pou; Sanghun Choi; Maryam Saeedifard; Vassilios Agelidis

doi:10.1109/IECON.2011.6120032

Analysis of voltage balancing limits in modular multilevel converters

Salvador Ceballos, Josep Pou, Sanghun Choi, Maryam Saeedifard, Vassilios Agelidis

Power Electronics and System Equipment

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

48 Citations (Scopus)

Abstract

The modular multilevel converter (MMC) is one of the most promising converter topologies for high-voltage applications, especially for high-voltage direct-current (HVDC) transmission systems. One of the most challenging issues associated with the MMC is the capacitor voltage variations, which if not properly controlled, result in large circulating currents flowing through the converter legs. This paper develops a mathematical model to formulate and analyze capacitor voltage variations and the circulating currents within the MMC legs. Based on the developed model, the limits to the capacitor voltage balancing task are derived and graphically presented. A set of simulation results conducted in MATLAB/Simulink environment are presented to verify the accuracy of the mathematical analysis.

Original language	English
Title of host publication	Proceedings
Subtitle of host publication	IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society
Pages	4397-4402
Number of pages	6
DOIs	https://doi.org/10.1109/IECON.2011.6120032
Publication status	Published - 2011
Event	37th Annual Conference of the IEEE Industrial Electronics Society, IECON 2011 - Melbourne, VIC, Australia Duration: 7 Nov 2011 → 10 Nov 2011

Publication series

Name	IECON Proceedings (Industrial Electronics Conference)

Conference

Conference	37th Annual Conference of the IEEE Industrial Electronics Society, IECON 2011
Country/Territory	Australia
City	Melbourne, VIC
Period	7/11/11 → 10/11/11

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/IECON.2011.6120032

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Ceballos, S., Pou, J., Choi, S., Saeedifard, M., & Agelidis, V. (2011). Analysis of voltage balancing limits in modular multilevel converters. In Proceedings: IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society (pp. 4397-4402). Article 6120032 (IECON Proceedings (Industrial Electronics Conference)). https://doi.org/10.1109/IECON.2011.6120032

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title = "Analysis of voltage balancing limits in modular multilevel converters",

abstract = "The modular multilevel converter (MMC) is one of the most promising converter topologies for high-voltage applications, especially for high-voltage direct-current (HVDC) transmission systems. One of the most challenging issues associated with the MMC is the capacitor voltage variations, which if not properly controlled, result in large circulating currents flowing through the converter legs. This paper develops a mathematical model to formulate and analyze capacitor voltage variations and the circulating currents within the MMC legs. Based on the developed model, the limits to the capacitor voltage balancing task are derived and graphically presented. A set of simulation results conducted in MATLAB/Simulink environment are presented to verify the accuracy of the mathematical analysis.",

author = "Salvador Ceballos and Josep Pou and Sanghun Choi and Maryam Saeedifard and Vassilios Agelidis",

year = "2011",

doi = "10.1109/IECON.2011.6120032",

language = "English",

isbn = "9781612849720",

series = "IECON Proceedings (Industrial Electronics Conference)",

pages = "4397--4402",

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Ceballos, S, Pou, J, Choi, S, Saeedifard, M & Agelidis, V 2011, Analysis of voltage balancing limits in modular multilevel converters. in Proceedings: IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society., 6120032, IECON Proceedings (Industrial Electronics Conference), pp. 4397-4402, 37th Annual Conference of the IEEE Industrial Electronics Society, IECON 2011, Melbourne, VIC, Australia, 7/11/11. https://doi.org/10.1109/IECON.2011.6120032

Analysis of voltage balancing limits in modular multilevel converters. / Ceballos, Salvador; Pou, Josep; Choi, Sanghun et al.
Proceedings: IECON 2011 - 37th Annual Conference of the IEEE Industrial Electronics Society. 2011. p. 4397-4402 6120032 (IECON Proceedings (Industrial Electronics Conference)).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Analysis of voltage balancing limits in modular multilevel converters

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AU - Saeedifard, Maryam

AU - Agelidis, Vassilios

PY - 2011

Y1 - 2011

N2 - The modular multilevel converter (MMC) is one of the most promising converter topologies for high-voltage applications, especially for high-voltage direct-current (HVDC) transmission systems. One of the most challenging issues associated with the MMC is the capacitor voltage variations, which if not properly controlled, result in large circulating currents flowing through the converter legs. This paper develops a mathematical model to formulate and analyze capacitor voltage variations and the circulating currents within the MMC legs. Based on the developed model, the limits to the capacitor voltage balancing task are derived and graphically presented. A set of simulation results conducted in MATLAB/Simulink environment are presented to verify the accuracy of the mathematical analysis.

AB - The modular multilevel converter (MMC) is one of the most promising converter topologies for high-voltage applications, especially for high-voltage direct-current (HVDC) transmission systems. One of the most challenging issues associated with the MMC is the capacitor voltage variations, which if not properly controlled, result in large circulating currents flowing through the converter legs. This paper develops a mathematical model to formulate and analyze capacitor voltage variations and the circulating currents within the MMC legs. Based on the developed model, the limits to the capacitor voltage balancing task are derived and graphically presented. A set of simulation results conducted in MATLAB/Simulink environment are presented to verify the accuracy of the mathematical analysis.

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SN - 9781612849720

T3 - IECON Proceedings (Industrial Electronics Conference)

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BT - Proceedings

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Analysis of voltage balancing limits in modular multilevel converters

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