Joint source-channel decoding ASIP architecture for sensor networks

Pablo Ituero; Gorka Landaburu; Javier Del Ser; Marisa López-Vallejo; Pedro M. Crespo; Vicente Atxa; Jon Altuna

doi:10.1007/978-3-540-72685-2_10

Joint source-channel decoding ASIP architecture for sensor networks

Pablo Ituero^*
, Gorka Landaburu
, Javier Del Ser
, Marisa López-Vallejo
, Pedro M. Crespo
, Vicente Atxa
, Jon Altuna

^*Corresponding author for this work

Technical University of Madrid

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

In a sensor network, exploiting the correlation among different sources allows a significant reduction of the transmitted energy at the cost of a complex decoder scheme. This paper introduces the first hardware implementation for joint source-channel decoding of correlated sources. Specifically, a dual-clustered VLIW processor with a highly optimized datapath is presented.

Original language	English
Title of host publication	Embedded Software and Systems - Third International Conference, ICESS 2007, Proceedings
Publisher	Springer Verlag
Pages	98-108
Number of pages	11
ISBN (Print)	3540726845, 9783540726845
DOIs	https://doi.org/10.1007/978-3-540-72685-2_10
Publication status	Published - 2007
Externally published	Yes
Event	3rd International Conference on Embedded Software and Systems, ICESS 2007 - Daegu, Korea, Republic of Duration: 14 May 2007 → 16 May 2007

Publication series

Name	Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume	4523 LNCS
ISSN (Print)	0302-9743
ISSN (Electronic)	1611-3349

Conference

Conference	3rd International Conference on Embedded Software and Systems, ICESS 2007
Country/Territory	Korea, Republic of
City	Daegu
Period	14/05/07 → 16/05/07

Keywords

ASIP
DSC
Factor graphs
Joint source-channel coding
Sensor networks
Turbo codes
VLIW

Access to Document

10.1007/978-3-540-72685-2_10

Cite this

Ituero, P., Landaburu, G., Del Ser, J., López-Vallejo, M., Crespo, P. M., Atxa, V., & Altuna, J. (2007). Joint source-channel decoding ASIP architecture for sensor networks. In Embedded Software and Systems - Third International Conference, ICESS 2007, Proceedings (pp. 98-108). (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 4523 LNCS). Springer Verlag. https://doi.org/10.1007/978-3-540-72685-2_10

Ituero, Pablo ; Landaburu, Gorka ; Del Ser, Javier et al. / Joint source-channel decoding ASIP architecture for sensor networks. Embedded Software and Systems - Third International Conference, ICESS 2007, Proceedings. Springer Verlag, 2007. pp. 98-108 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)).

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title = "Joint source-channel decoding ASIP architecture for sensor networks",

abstract = "In a sensor network, exploiting the correlation among different sources allows a significant reduction of the transmitted energy at the cost of a complex decoder scheme. This paper introduces the first hardware implementation for joint source-channel decoding of correlated sources. Specifically, a dual-clustered VLIW processor with a highly optimized datapath is presented.",

keywords = "ASIP, DSC, Factor graphs, Joint source-channel coding, Sensor networks, Turbo codes, VLIW",

author = "Pablo Ituero and Gorka Landaburu and \{Del Ser\}, Javier and Marisa L{\'o}pez-Vallejo and Crespo, \{Pedro M.\} and Vicente Atxa and Jon Altuna",

year = "2007",

doi = "10.1007/978-3-540-72685-2\_10",

language = "English",

isbn = "3540726845",

series = "Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)",

publisher = "Springer Verlag",

pages = "98--108",

booktitle = "Embedded Software and Systems - Third International Conference, ICESS 2007, Proceedings",

address = "Germany",

note = "3rd International Conference on Embedded Software and Systems, ICESS 2007 ; Conference date: 14-05-2007 Through 16-05-2007",

}

Ituero, P, Landaburu, G, Del Ser, J, López-Vallejo, M, Crespo, PM, Atxa, V & Altuna, J 2007, Joint source-channel decoding ASIP architecture for sensor networks. in Embedded Software and Systems - Third International Conference, ICESS 2007, Proceedings. Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics), vol. 4523 LNCS, Springer Verlag, pp. 98-108, 3rd International Conference on Embedded Software and Systems, ICESS 2007, Daegu, Korea, Republic of, 14/05/07. https://doi.org/10.1007/978-3-540-72685-2_10

Joint source-channel decoding ASIP architecture for sensor networks. / Ituero, Pablo; Landaburu, Gorka; Del Ser, Javier et al.
Embedded Software and Systems - Third International Conference, ICESS 2007, Proceedings. Springer Verlag, 2007. p. 98-108 (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics); Vol. 4523 LNCS).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Joint source-channel decoding ASIP architecture for sensor networks

AU - Ituero, Pablo

AU - Landaburu, Gorka

AU - Del Ser, Javier

AU - López-Vallejo, Marisa

AU - Crespo, Pedro M.

AU - Atxa, Vicente

AU - Altuna, Jon

PY - 2007

Y1 - 2007

N2 - In a sensor network, exploiting the correlation among different sources allows a significant reduction of the transmitted energy at the cost of a complex decoder scheme. This paper introduces the first hardware implementation for joint source-channel decoding of correlated sources. Specifically, a dual-clustered VLIW processor with a highly optimized datapath is presented.

AB - In a sensor network, exploiting the correlation among different sources allows a significant reduction of the transmitted energy at the cost of a complex decoder scheme. This paper introduces the first hardware implementation for joint source-channel decoding of correlated sources. Specifically, a dual-clustered VLIW processor with a highly optimized datapath is presented.

KW - ASIP

KW - DSC

KW - Factor graphs

KW - Joint source-channel coding

KW - Sensor networks

KW - Turbo codes

KW - VLIW

UR - https://www.scopus.com/pages/publications/38749108537

U2 - 10.1007/978-3-540-72685-2_10

DO - 10.1007/978-3-540-72685-2_10

M3 - Conference contribution

AN - SCOPUS:38749108537

SN - 3540726845

SN - 9783540726845

T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

SP - 98

EP - 108

BT - Embedded Software and Systems - Third International Conference, ICESS 2007, Proceedings

PB - Springer Verlag

T2 - 3rd International Conference on Embedded Software and Systems, ICESS 2007

Y2 - 14 May 2007 through 16 May 2007

ER -

Ituero P, Landaburu G, Del Ser J, López-Vallejo M, Crespo PM, Atxa V et al. Joint source-channel decoding ASIP architecture for sensor networks. In Embedded Software and Systems - Third International Conference, ICESS 2007, Proceedings. Springer Verlag. 2007. p. 98-108. (Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)). doi: 10.1007/978-3-540-72685-2_10

Joint source-channel decoding ASIP architecture for sensor networks

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Keywords

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