Using MARTE and SysML for Modeling Real-Time Embedded Systems

Using model-based approaches for designing embedded systems helps remove unnecessary details in a manner that reduces production costs, increases the potential for easy validation and verification, and facilitates reuse and evolution. In this context, a common practice is to use UML as the base language, possibly specialized by the so-called profiles. Despite the ever increasing number of profiles being built in many domains, there is still insufficient focus on discussing the issue of combining multiple profiles. Indeed, a single profile may not be adequate to cover all aspects required in the multidisciplinary domain of embedded systems. In this chapter, we assess possible strategies for combining the SysML and MARTE profiles in a common modeling framework, while avoiding specification conflicts. We show that, despite some semantic and syntactical overlapping, the two are highly complementary for specifying embedded systems at different abstraction levels. We conclude, however, that a convergence agenda is highly desirable to ensure proper alignment of some key language features.