Data content scrubbing approach for SRAM based FPGA designs

The configuration memory of SRAM-based FPGAs can be susceptible to induced faults potentially causing errors that may impact devices' functionality (depending on the criticality of the affected bit). The accumulation of those errors increase the probability of malfunction. The scrubbing is a hardening technique utilized to refresh the configuration memory of the FPGA, which defines the functionality of the device and can store user data content. While, scrubbing of the configuration memory of FPGAs is a well established strategy, the scrubbing of the data content has not been sufficiently addressed. Due to this, the present work proposes a scrubbing approach to clean errors from the data memories implemented as BRAMs or distributed memories based, and physically validated, on the ZYNQ from Xilinx.