TY - JOUR
T1 - Fixed-complexity regularized vector precoding for the multiuser MIMO downlink channel
AU - Barrenechea, Maitane
AU - Thompson, John S.
AU - Mendicute, Mikel
AU - Del Ser, Javier
PY - 2009
Y1 - 2009
N2 - A fixed-throughput vector precoding (VP) approach specially suitable for hardware implementation in field programmable gate array (FPGA) devices is presented in this paper. The algorithm, which is based on the sphere encoder (SE), is divided into two main stages: at the preprocessing stage, the columns of the precoding matrix are ordered following any of the ordering approaches that have been proposed in this paper. Secondly, the search tree is configured so as to yield an appropriate bit error rate (BER) performance. Simulation results show that the BER performance of the proposed algorithm is very close to that of the SE, whereas its complexity is significantly smaller.
AB - A fixed-throughput vector precoding (VP) approach specially suitable for hardware implementation in field programmable gate array (FPGA) devices is presented in this paper. The algorithm, which is based on the sphere encoder (SE), is divided into two main stages: at the preprocessing stage, the columns of the precoding matrix are ordered following any of the ordering approaches that have been proposed in this paper. Secondly, the search tree is configured so as to yield an appropriate bit error rate (BER) performance. Simulation results show that the BER performance of the proposed algorithm is very close to that of the SE, whereas its complexity is significantly smaller.
UR - http://www.scopus.com/inward/record.url?scp=84863772091&partnerID=8YFLogxK
M3 - Conference article
AN - SCOPUS:84863772091
SN - 2219-5491
SP - 2406
EP - 2410
JO - European Signal Processing Conference
JF - European Signal Processing Conference
T2 - 17th European Signal Processing Conference, EUSIPCO 2009
Y2 - 24 August 2009 through 28 August 2009
ER -